Scientific journal
European Journal of Natural History
ISSN 2073-4972
ИФ РИНЦ = 0,301

THE TRANSISTOR CHOPPER BLOCK SCHEMATIC DIAGRAM OPTIMIZATION WITH THE TRANSFORMER LOADING

Magazinnik L.T.

The transistor choppers are being widely used in the various electrical installations. In those cases, when the transformer is the inverter loading, the double - step transducers with the bridge circuit, or the circuit with the midpoint in the transformer primary winding (e.g. «the neutral circuit») is quite inefficient, as the constant component appearance is inevitably just in the inverter alternating current (AC) diagonal, that it is being resulted in the transformer usage contamination, and also the air clearance in the core necessity. The constant component is absent in the half - bridge inverters, having presented by themselves the half - bridge from both transistors, having shunted by two bypassed diodes and two tandem - connected capacitors [1, 2]. The control, that is the output parameters regulation (e.g. the current, voltage) in the known inverters of such type, is carried out by the pulse - width modulation method just from the standard control systems. The external characteristics consideration at the various control pulses on - off time ratios has been shown, that it is necessary to have, approximately, the three - fold supply by the voltage for the linear hardening characteristic receiving in the closed by voltage loop control system (e.g. in the range of 0 - Idном), or to increase the capacity of the capacitors. In the both cases, the overall dimensions and the installation´s rated capacity are being increased, and also the losses in the transistors are being increased. All these shortcomings removal and defects elimination have been suggested the decisions, which have been stated in [3]. The new block schematic diagram of the half - bridge transistor has been presented in the Fig. 1, and it is contained the half - bridge just from the transistors 1, 2, having shunted by the both bypass diodes 3, 4, the both capacitors 5, 6, having formed, as a whole, with the transistors 1, 2 the bridge, having connected by the direct current (DC) diagonal to the Uп power supply. So, the primary winding 7 of the impedance matching transformer is being included in the alternating current (AC) diagonal, and its secondary winding 8 through the diode bridge 9 is being connected to the direct current (DC) loading 10 of the actively - inductive character. The smoothing choke 11 and the current sensor 12 are being connected, sequentially, with the loading 10, but the half - period average voltage sensor 13 - in parallel on the loading. The control system 14 is being connected with the transistors 1 and 2 driving points by its outputs, and it is closed by the load current and by the load voltage by its output signals, correspondingly, just from the current sensor 12 and the half - period average voltage sensor 13. The R - C chain, having consisted in, serially, connected the capacitor 16 and the both resisters 17 and 18 to the corresponding pulses generator terminals 15, having had the control system component part 14. The diode bridge alternating current (AC) diagonal 19 is being connected in, in parallel, the resistor 18, and its direct current (DC) diagonal is being shunted in the direction, which is being carried the current, by the transistor 20. To the transistor driving point 20 through the logical switch 21 the comparison element output 22 is being connected to, on the first input of which the standard voltage U1э is being connected to, which is quite proportional to the given rectified load voltage, and on the second input it is being connected to the sensor voltage from the transducer output of the half - period average voltage 13 by the degenerative feedback principle, which is quite proportional to the factual load voltage, the logical switch driving point 21 is being connected to the comparator output 23, on the first input of which the standard current signal U2э is being connected to, which is quite proportional to the critical current (e.g. Iкр) of the non - linear part conversion of the half - bridge transistor inverter external characteristic, and on the second input from the current sensor transducer output 12 is being given by the negative feedback loop signal principle, which is quite proportional to the factual load current.

This device is being functioned in the following way. Let the power supply Uп is being turned on, the corresponding reference voltages values U1э и U2э have been defined, that is the device´s mode of operation has been specified, for example, with the maximum value on the load voltage and the load current within the limits of 0 < Id < Imax. Let us suppose also, that the current Id is not being changed during the inter - switching interval, and the matching transformer has the «ideal» rectangular hysteresis loop, because of the inductance presence in the loading 10. In this mode of operation, at Id  Iкр the current sensor output signal standard 12 is less, or it is quite equal to the U2э signal, therefore, the enabling signal at the comparator output 23 is absent, and the logical switch 21 is being locked. And, correspondingly, the transistor 20 has been shunted, that is the pulse generator 15 is just being functioned with the constant frequency, but the load current and the load voltage regulation is being conducted by the pulse - width method. At Id = Iкр the voltage is still equal to, approximately, Uп/2. The external characteristic (e.g. with no account taken of the pulse - width modulator functioning, and at the voltage supply complete absence) is quite the linear and the rigid one.

p

Fig. 1

At Id > Iкр, the signal from the current sensor 12 is being become more, than U2э, the switch 21 is being unlocked, and it is being gated the signal through just from the comparison element output 22, the capacitors 5, 6 are being discharged for the less time and, moreover, the trigger voltage is being appeared at the transistor input 20, at the signal fade - down just from the half - period average voltage sensor 13. As the transistor 20 is being shunted the resistor 18 in the aggregate with the diode bridge 19, the R-C chain resistance is being descended, the time constant is being declined, and the impulses oscillator frequency 15 is being risen. The external characteristic (e.g. at the voltage supply complete absence) is being increased its inclination in somewhat, but it is being left quite near to the linear one and, moreover, it is being left the, sufficiently, hardening one, therefore, (10-15)% voltage supply of the Uп power source is quite sufficiently just for the absolutely hardening external characteristic receiving, whereas it is usually needed about 300 % supply just in the known circuits.

Thus, the suggested block schematic diagram is being permitted to provide the linearity and the necessary external characteristics rigidity of the half-bridge transistor inverter without any voltage supply increase, or the capacity rise of the capacitors, and also to reduce the switching losses just in the transistors.

References

  1. «Invertec» - V - 130 -S - Lincoln, the USA, (The catalogue) 1998 - 2000-es.
  2. "The Secondary Power Supplies". The Patent of the Russian Federation (RF) № 2131640 dated from 10.06.1999 The authors L.T. Magazinnik etc.
  3. "The Half - Bridge Transistor Inverter". The Patent of the Russian Federation (RF) № 2326484 dated from 10.06.2008. The authors L.T. Magazinnik, A.G. Magazinnik.

The work was submitted to international scientific conference «Priorities for Science, Technology and Innovation», Egypt (Sharm el-Sheikh), November, 20-27, 2008. Came to the editorial office оn 07.04.2009.